Venue: The Infantry Hotel, #66, Infantry Road, Bangalore, India, Ph. No.: +91 80 2559 1800/6890/2281 ,09246372722, 090088 55911, Walk-in Time: 9.00 AM to 3:00 PM.
A snapshot of our Hitech practice:
Ø One of the largest ASIC design and Embedded SW services teams
Ø 14-year track record of first pass silicon success across 300+ ASIC tapeouts
Ø In-depth expertise on various EDA tool flows that positions us way ahead of the competition
Ø A niche player in platform development based on Android, Linux, Windows mobile/Windows phone and other HLOS
Ø Preferred Embedded SW solution provider for top 3 OEMs and topmost chipset vendors
Ø Globally distributed design centers - San Jose, California (US), Hyderabad, Visakhapatnam and Bangalore
EMBEDDED SOFTWARE REQUIREMENTS
Qualification: BE/B.Tech. or ME/M.Tech. in ECE/EEE/CSE | Experience: 3 – 7 years | Location: Bangalore
VC++, MFC, Win32 (Job Code: MFC)
· Experience using VC++ with MFC and Win32, sound knowledge of OOPs concepts, multi-threading
· Understanding of STL, Windows Sockets and .Net Technologies
Android Multimedia frameworks (Job Code: Android MF)
· Strong knowledge of C/C++ and multimedia fundamentals
· Hands-on experience in Linux/Android multimedia framework Opencore/Openmax/Stagefright on HW platforms/SOCs
· Expertise in any of the following:
- Pre/Post Processing/Algorithms: Video surveillance, Audio domain architect, IP camera segment
- Microsoft DirectShow or SGX/OpenGL/ES, familiarity with multimedia encoders and decoders would be an added advantage
LTE Physical Firmware/DSP (Job Code: LPF/DSP)
· Signal processing background with good understanding of OFDM, MIMO
· Strong C, embedded and real time programming, C/Assembly on DSPs/RISCs
· Experience in Lab tools/Analyzers/Emulators
LTE MAC Firmware (Job Code: LMacF)
· Experience in L2 (MAC) firmware, hands-on working experience in C/Assembly, Lab tools/Analyzers/Emulators/Embedded systems/Microcontroller
· Upper MAC, lower MAC, LTE experience preferred
· Linux internals such as device drivers, networking interfaces,
· QoS and the TCP/IP stack
· Signal processing understanding, concept of OFDM, MIMO
BSP-Linux Device Driver (Job Code: BSP Linux)
· Good understanding of processor (ARM, MIPS, x86) and overall system architecture with OS internals and mobile platform SW (Linux/WinCE/Android)
· Firmware and device driver development for mobile and set-top box based platforms (PM, Connectivity/MM devices/Memory Devices/ HID/Bus devices/USB/PCI etc.)
· Developing Board Support Package (BSP), boot loaders, OS porting and bring up on SDPs
Wi-Fi (Job Code: Wi-Fi)
· Proficiency in C/C++ and assembly programming skills, IEEE802.11 a/b/g/n, Wi-Fi Protocol
· Expertise on mobile OS-Linux/Android/WinCE/WinMobile, good knowledge of connectivity buses - SDIO/SPI/PCI/USB
· Experience with Wi-Fi Display and Wi-Fi Direct related technologies
· Exposure to Wi-Fi forum certification, Wi-Fi lab setup preferred
ASIC & FPGA REQUIREMENTS
Qualification: BE/B.Tech. or ME/M.Tech. in ECE/EEE/CSE | Positions open: Project Engineer, Tech Lead, Project Lead, Project Manager and Program Manager
ASIC/SoC Verification (Job Code: ASIC-Ver)
Experience: 3 – 15 years | Location: Hyderabad, Bangalore, Visakhapatnam & Noida
· Expertise in HVL like Secman or SystemVerilog OVM/VMM/UVM/eRM, analog and mixed signal verification
· Exposure to SoC verification around ARM, MIPS, Tensilica and peripherals using C/ASM
ASIC Implementation (Job Code: ASIC-IMP)
Experience: 4 – 10 years | Location: Hyderabad, Bangalore & Visakhapatnam
· Experience in logic synthesis, low power synthesis, timing constraints, timing closure, static timing analysis, cross talk analysis & repair, formal verification
ASIC DFT (Job Code: ASIC-DFT)
Experience: 2 – 8 years | Location: Hyderabad, Bangalore & Visakhapatnam
· Expertise in scan, test compression, ATPG, LBIST, MBIST, JTAG, ATE equipment, test mode timing, simulation, silicon debug
ASIC Physical Design Engineers/Leads/Managers (Job Code: ASIC-PD/M)
Experience: 2 – 14 years | Location: Hyderabad, Bangalore, Visakhapatnam & Noida
· Experience in partitioning, IO ring preparation, floorplanning, PG planning, place and route, clock tree synthesis, timing closure, static timing analysis, IR drop analysis, physical verification,signal integrity, low power design
· For managers, experience in managing multimillion gate hierarchical designs using deep submicron process technologies is essential.
ASIC Standard Cell/Memory/IO/Analog (Job Code: ASIC-Standard Cell/Memory/IO/Analog)
Experience: 2 – 5 years | Location: Hyderabad, Bangalore & Noida
· Experience in layout design of Standard Cell/Memory/IO/Analog
Logic Design (Job Code: ASIC/FPGA-LD)
Experience: 3 – 15 years | Location: Hyderabad, Bangalore & Noida
· Microarchitecture, logic design, RTL coding, logic synthesis, expertise on ARM, cortex processors and designing subsystems around them
FPGA Design and Verification (Job Code: FPGA)
Experience: 2 – 15 years | Location: Hyderabad & Bangalore
· Experience in design, verification & validation for FPGA based systems. Aerospace or Rail domain experience would be an added advantage.
· Expertise in verification using system verilog (OVM/UVM), Verilog or VHDL
· FPGA based design implementation on Actel, ALTERA, XILINX
Candidates who are unable to attend the drive can forward their resumes mentioning "Job Code & Years of Experience" in the Subject line to: Hitech -ASIC & FPGA requirements :- Praveen.Vemula@infotech-enterprises.com & for Hitech – Embedded Software requirements Srinivas.Dodla@infotech-enterprises.com
Please adv. Candidates to carry relevant documents for the interview: Updated resume, academic qualification documents, Experience certificate, Latest 3 months pay slips, etc.
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